EC ENGR 215E · EE 215ESignaling and Synchronization
Electrical and Computer Engineering · 4 units · Graduate courses (200-299)
Analysis and design of circuits for synchronization and communication for VLSI systems. Use of both digital and analog design techniques to improve data rate of electronics between functional blocks, chips, and systems. Advanced clocking methodologies, phase-locked loop design for clock generation, and high-performance wire-line transmitters, receivers, and timing recovery circuits.
Letter grading.
When it runs
- Winter 2026
- Spring 2027
Scheduled, not typical — from UCLA’s Schedule of Classes, which publishes Fall 2025 through Spring 2027 and nothing before it.
Requisites
Official UCLA wording
Requisites: courses 215A, M216A.
BruinTree reads · Prerequisite
confidence 1.00 · from textRequires
Everything that has to come before this course, not just the courses named in the requisite above.
EC ENGR 215E
- EC ENGR 215AAnalog Integrated Circuit Design
- EC ENGR 115BAnalog Electronic Circuits II
- EC ENGR M216ADesign of VLSI Circuits and Systems
- EC ENGR M16Logic Design of Digital Systems
- COM SCI M51ALogic Design of Digital Systems
2 direct requisites. Showing 6 courses over 3 levels; the branches marked with a count carry on past it. Every course here opens its own tree.
Unlocks
What this course is a requisite for, and what those courses lead to in turn.
No course in the catalog lists this as a requisite.